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Proceedings Paper

LER transfer from a mask to wafers
Author(s): Hiroyoshi Tanabe; Ginga Yoshizawa; Yan Liu; Vikram L. Tolani; Koichiro Kojima; Naoya Hayashi
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Paper Abstract

Contribution of mask line edge roughness (LER) to resist LER on wafers was studied both by simulations and experiments. LER transfer function (LTF) introduced by Naulleau and Gallatin was generalized to include the effect of mask error enhancement factor (MEEF). Low spatial frequency part of LTF was enhanced by MEEF while high spatial frequency part was suppressed due to the numerical aperture limit of a stepper. Our model was experimentally verified as follows. First LER of a mask was measured by a scanning electron microscope. Then the mask LER was multiplied by LTF to simulate the aerial image LER on wafers. It was confirmed that the simulated LER agreed well with the LER measured by AIMSTM. Based on our model the contribution of the mask LER to the resist LER on wafers was estimated. According to our estimation the requirement of the mask LER should be as tight as that of the resist LER on wafers.

Paper Details

Date Published: 14 May 2007
PDF: 8 pages
Proc. SPIE 6607, Photomask and Next-Generation Lithography Mask Technology XIV, 66071H (14 May 2007); doi: 10.1117/12.728964
Show Author Affiliations
Hiroyoshi Tanabe, Intel Corp. (Japan)
Ginga Yoshizawa, Intel Corp. (Japan)
Yan Liu, Intel Corp. (United States)
Vikram L. Tolani, Intel Corp. (United States)
Koichiro Kojima, Dai Nippon Printing Co., Ltd. (Japan)
Naoya Hayashi, Dai Nippon Printing Co., Ltd. (Japan)

Published in SPIE Proceedings Vol. 6607:
Photomask and Next-Generation Lithography Mask Technology XIV
Hidehiro Watanabe, Editor(s)

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