
Proceedings Paper
Immersion lithography defectivity analysis at DUV inspection wavelengthFormat | Member Price | Non-Member Price |
---|---|---|
$17.00 | $21.00 |
Paper Abstract
Significant effort has been directed in recent years towards the realization of immersion lithography at 193nm
wavelength. Immersion lithography is likely a key enabling technology for the production of critical layers for 45nm and
32nm design rule (DR) devices. In spite of the significant progress in immersion lithography technology, there remain
several key technology issues, with a critical issue of immersion lithography process induced defects. The benefits of the
optical resolution and depth of focus, made possible by immersion lithography, are well understood. Yet, these benefits
cannot come at the expense of increased defect counts and decreased production yield. Understanding the impact of the
immersion lithography process parameters on wafer defects formation and defect counts, together with the ability to
monitor, control and minimize the defect counts down to acceptable levels is imperative for successful introduction of
immersion lithography for production of advanced DR's. In this report, we present experimental results of immersion
lithography defectivity analysis focused on topcoat layer thickness parameters and resist bake temperatures. Wafers were
exposed on the 1150i-α-immersion scanner and 1200B Scanner (ASML), defect inspection was performed using a DUV
inspection tool (UVisionTM, Applied Materials). Higher sensitivity was demonstrated at DUV through detection of small
defects not detected at the visible wavelength, indicating on the potential high sensitivity benefits of DUV inspection for
this layer. The analysis indicates that certain types of defects are associated with different immersion process parameters.
This type of analysis at DUV wavelengths would enable the optimization of immersion lithography processes, thus
enabling the qualification of immersion processes for volume production.
Paper Details
Date Published: 5 April 2007
PDF: 10 pages
Proc. SPIE 6518, Metrology, Inspection, and Process Control for Microlithography XXI, 65180S (5 April 2007); doi: 10.1117/12.712400
Published in SPIE Proceedings Vol. 6518:
Metrology, Inspection, and Process Control for Microlithography XXI
Chas N. Archie, Editor(s)
PDF: 10 pages
Proc. SPIE 6518, Metrology, Inspection, and Process Control for Microlithography XXI, 65180S (5 April 2007); doi: 10.1117/12.712400
Show Author Affiliations
E. Golan, Applied Materials (Israel)
D. Meshulach, Applied Materials (Israel)
N. Raccah, Applied Materials (Israel)
J. Ho. Yeo, Applied Materials (Israel)
O. Dassa, Applied Materials (Israel)
D. Meshulach, Applied Materials (Israel)
N. Raccah, Applied Materials (Israel)
J. Ho. Yeo, Applied Materials (Israel)
O. Dassa, Applied Materials (Israel)
S. Brandl, Qimonda, North America Corp. (United States)
C. Schwarz, Qimonda, North America Corp. (United States)
B. Pierson, ASML (United States)
W. Montgomery, Albany NanoTech Complex (United States)
C. Schwarz, Qimonda, North America Corp. (United States)
B. Pierson, ASML (United States)
W. Montgomery, Albany NanoTech Complex (United States)
Published in SPIE Proceedings Vol. 6518:
Metrology, Inspection, and Process Control for Microlithography XXI
Chas N. Archie, Editor(s)
© SPIE. Terms of Use
