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Proceedings Paper

Issues and challenges of double patterning lithography in DRAM
Author(s): Seo-Min Kim; Sun-Young Koo; Jae-Seung Choi; Young-Sun Hwang; Jung-Woo Park; Eung-Kil Kang; Chang-Moon Lim; Seung-Chan Moon; Jin-Woong Kim
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Paper Abstract

Double patterning lithography has been one of the candidates for sub-40nm patterning era, and has a lot of process issues to be confirmed. Last year, we presented the issues in double patterning lithography with a real flash gate pattern. Process flow was suggested and CD uniformity due to overlay was analyzed. And the layout decomposition and the two types of double patterning of positive and negative tone were studied with 1-dimensional pattern. In this paper, the implementation to DRAM patterns is examined, which consist of 2-dimensional patterns. Double patterning methods and the selection of their tone for each layer are studied, and the difficulties from the randomness of core pattern are also considered. As a result, DRAM patterns have more restrictions on the double patterning method and selection of tone, and the aggressive layout decomposition should be designed to solve the difficulty in core patterning. Therefore, 37nm DRAM layout can be patterned and the overlay control and cost still remain as dominant obstacles.

Paper Details

Date Published: 26 March 2007
PDF: 7 pages
Proc. SPIE 6520, Optical Microlithography XX, 65200H (26 March 2007); doi: 10.1117/12.712035
Show Author Affiliations
Seo-Min Kim, Hynix Semiconductor Inc. (South Korea)
Sun-Young Koo, Hynix Semiconductor Inc. (South Korea)
Jae-Seung Choi, Hynix Semiconductor Inc. (South Korea)
Young-Sun Hwang, Hynix Semiconductor Inc. (South Korea)
Jung-Woo Park, Hynix Semiconductor Inc. (South Korea)
Eung-Kil Kang, Hynix Semiconductor Inc. (South Korea)
Chang-Moon Lim, Hynix Semiconductor Inc. (South Korea)
Seung-Chan Moon, Hynix Semiconductor Inc. (South Korea)
Jin-Woong Kim, Hynix Semiconductor Inc. (South Korea)

Published in SPIE Proceedings Vol. 6520:
Optical Microlithography XX
Donis G. Flagello, Editor(s)

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