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Proceedings Paper

An ultrafast Geiger-mode single-photon avalanche diode in 0.18-μm CMOS technology
Author(s): Hod Finkelstein; Mark J. Hsu; Sadik Esener
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Paper Abstract

We demonstrate a new single-photon avalanche diode (SPAD) device, which utilizes the silicon-dioxide shallow-trench isolation (STI) structure common to all deep-submicron CMOS technologies, both for junction planarization and as an area-efficient guard-ring. This makes it possible to achieve an order-of-magnitude improvement in fill factor and a significant reduction in pixel area compared with existing CMOS SPADs, and results in improved SPAD performance. We present numerical simulations as well preliminary experimental results from a test chip, which was manufactured in an IBM 0.18 μm CMOS technology, and which incorporates the devices. With these new and efficient structures, 12 μm-pitch pixels with sub-10ns dead times are achievable without requiring active recharge, creating the opportunity to integrate large arrays of these ultra-fast SPADs for use in biological imaging systems.

Paper Details

Date Published: 3 November 2006
PDF: 10 pages
Proc. SPIE 6372, Advanced Photon Counting Techniques, 63720W (3 November 2006); doi: 10.1117/12.705259
Show Author Affiliations
Hod Finkelstein, Univ. of California, San Diego (United States)
Mark J. Hsu, Univ. of California, San Diego (United States)
Sadik Esener, Univ. of California, San Diego (United States)

Published in SPIE Proceedings Vol. 6372:
Advanced Photon Counting Techniques
Wolfgang Becker, Editor(s)

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