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Proceedings Paper

Alternating PSM for sub-60-nm DRAM gate single exposure
Author(s): Kunyuan Chen; Richard Lu; Kuo Kuei Fu; ChungPing Hsia; Chiang-Lin Shih; JengPing Lin
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Paper Abstract

The fast pattern shrinkage of DRAM has driven the lithography technology into the low k1 regime for sub-60 nm technology node. There are a lot of resolution enhancement techniques (RETs) e.g. OPC (Optical Proximity Correction), SB (Scattering Bar), SRAF (Sub-Resolution Assist Features) and DDL (Double Dipole Lithography) and Alternating PSM to enable the low k1 lithography [4]. However, among the RETs, the alternating PSM technique is a high cost solution because double exposure is needed to avoid phase conflict error. Therefore, the implementation of alternating PSM with single exposure for gate conductor layer is the main purpose of this study. Many kinds of pattern and phase designs in the main cell and periphery were investigated.

Paper Details

Date Published: 20 October 2006
PDF: 4 pages
Proc. SPIE 6349, Photomask Technology 2006, 63491T (20 October 2006); doi: 10.1117/12.685295
Show Author Affiliations
Kunyuan Chen, Nanya Technology Corp. (Taiwan)
Richard Lu, Nanya Technology Corp. (Taiwan)
Kuo Kuei Fu, Nanya Technology Corp. (Taiwan)
ChungPing Hsia, Nanya Technology Corp. (Taiwan)
Chiang-Lin Shih, Nanya Technology Corp. (Taiwan)
JengPing Lin, Nanya Technology Corp. (Taiwan)


Published in SPIE Proceedings Vol. 6349:
Photomask Technology 2006
Patrick M. Martin; Robert J. Naber, Editor(s)

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