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Proceedings Paper

Improvement of pipelines implementations in FPGA designs
Author(s): Nonel Thirer; Yitzhak David; I. Baal Zedaka; Uzi Efron
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Paper Abstract

System architecture has a significant impact on software performance. In this manuscript, a method to increase the performance of the microprocessors and FPGA based systems using pipeline processing, is presented. An improved implementation using this concept, for image and display processing, providing real time vision applications, is described.

Paper Details

Date Published: 7 September 2006
PDF: 7 pages
Proc. SPIE 6294, Infrared and Photoelectronic Imagers and Detector Devices II, 62940T (7 September 2006); doi: 10.1117/12.678445
Show Author Affiliations
Nonel Thirer, Holon Institute of Technology (Israel)
Yitzhak David, Holon Institute of Technology (Israel)
I. Baal Zedaka, Holon Institute of Technology (Israel)
Uzi Efron, Ben Gurion Univ. (Israel)
Holon Institute of Technology (Israel)

Published in SPIE Proceedings Vol. 6294:
Infrared and Photoelectronic Imagers and Detector Devices II
Randolph E. Longshore; Ashok Sood, Editor(s)

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