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Proceedings Paper

Silicide/high-k dielectric structures for nanotransistor gates
Author(s): I. A. Horin; A. D. Krivospitsky; A. A. Orlikovsky; A. E. Rogozhin; A. G. Vasiliev
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Paper Abstract

In this work results of investigation of technological processes of gate structure formation for devices with less then 100 nm channel length were presented. Gate structures with high-k (YSZ) gate dielectric and silicide (CoSi2) electrodes were analyzed. Influence of silicide process parameters on homogeneity of silicide formed in narrow trenches were considered.

Paper Details

Date Published: 10 June 2006
PDF: 8 pages
Proc. SPIE 6260, Micro- and Nanoelectronics 2005, 62600G (10 June 2006); doi: 10.1117/12.677066
Show Author Affiliations
I. A. Horin, Institute of Physics and Technology (Russia)
A. D. Krivospitsky, Institute of Physics and Technology (Russia)
A. A. Orlikovsky, Institute of Physics and Technology (Russia)
A. E. Rogozhin, Institute of Physics and Technology (Russia)
A. G. Vasiliev, Institute of Physics and Technology (Russia)
Moscow State Institute of Radioengineering, Electronics and Automation (Russia)

Published in SPIE Proceedings Vol. 6260:
Micro- and Nanoelectronics 2005
Kamil A. Valiev; Alexander A. Orlikovsky, Editor(s)

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