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Proceedings Paper

Demonstration of a 5.12 GHz optoelectronics sampling circuit for analog-to-digital converters
Author(s): Carlos Villa; Patrick Kumavor; Bruce Burgess; Eric Donkor
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Paper Abstract

In order to reduce the time jitter and increase the speed of the sampling circuits for Analog-to-Digital Converters (ADCs), optical techniques can be used since high speed optical pulses can be generated (in the order of GHz) with pulse width in the regime of femtoseconds. In this paper, we present an optoelectronic sampling circuit for an optical ADC with an aggregate 5.12 Gigasample/s and a time jitter of 80 fs. The RF signal to be sampled is connected to 8 sampling circuit in parallel. Each sampling channel consists of a reverse-biased photodiode that acts as a fast optoelectronic switch in series with a load resistor. A bias tee was used to couple the RF signal to be sampled, and the d.c. voltage to reverse bias the photodiodes. The DC offset RF signals was then connected to each channel and was sampled by actuating the photodiodes with a modelocked optical pulses having repetition rate of 640 MHz. A relative delay of 0.195 ns was set between the sampling clocks. Thus the sampling circuits sampled different phases of the RF. The outputs of the eight sampling circuits were multiplexed together to give an aggregate sampling rate of 5.12GSPS. Finally, a synchronizer trigger circuits was designed in order that all eight sampling circuits can be triggered for simultaneous measurement.

Paper Details

Date Published: 19 May 2006
PDF: 9 pages
Proc. SPIE 6236, Signal and Data Processing of Small Targets 2006, 623607 (19 May 2006); doi: 10.1117/12.668902
Show Author Affiliations
Carlos Villa, Univ. of Connecticut (United States)
Patrick Kumavor, Univ. of Connecticut (United States)
Bruce Burgess, Univ. of Connecticut (United States)
Eric Donkor, Univ. of Connecticut (United States)

Published in SPIE Proceedings Vol. 6236:
Signal and Data Processing of Small Targets 2006
Oliver E. Drummond, Editor(s)

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