Share Email Print

Proceedings Paper

Correlation of wafer backside defects to photolithography hot spots using advanced macro inspection
Author(s): Alan Carlson; Tuan Le
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

Defects on the backside of a wafer during processing can come from many sources. Particles and scratches on the backsides of wafers can be caused by wafer handling equipment such as robots and chucks, as well as by CMP processes. In addition, cross-contamination of wafers and handling equipment can occur when wafers move from tool to tool, through the production line. When wafers are exposed, backside defects can cause localized areas of poor lithography pattern resolution on the frontsides of wafers, resulting in increased rework rates, decreased throughput, and yield loss. As minimum feature sizes continue to shrink with each new technology node, devices become denser and exposure tool depth of focus decreases - making the elimination of lithography hot spots an even more critical issue. At a major worldwide IDM, automated macro defect inspection tools for integrated front, edge, and backside inspection have been implemented to inspect wafers at several After Develop Inspection (ADI) and post-etch inspection steps. These tools have been used to detect foreign material and scratches on the backsides of several lots that were caused by another process tool, causing photolithography hot spots. This paper describes advanced macro inspection of wafer front and back surfaces and how the inspection data was used to correlate backside defects to photolithography hot spots, and take corrective action.

Paper Details

Date Published: 24 March 2006
PDF: 7 pages
Proc. SPIE 6152, Metrology, Inspection, and Process Control for Microlithography XX, 61523E (24 March 2006); doi: 10.1117/12.656937
Show Author Affiliations
Alan Carlson, August Technology (United States)
Tuan Le, August Technology (United States)

Published in SPIE Proceedings Vol. 6152:
Metrology, Inspection, and Process Control for Microlithography XX
Chas N. Archie, Editor(s)

© SPIE. Terms of Use
Back to Top
Sign in to read the full article
Create a free SPIE account to get access to
premium articles and original research
Forgot your username?