We have constructed a hot spot management flow for LSI manufacturing in the ultra-low k₁ lithography era. This flow involves three main management steps: hot spot reduction, hot spot extraction and hot spot monitoring. Hot spot reduction works for lithography friendly restriction (RDR) and manufacturability check (MC). Hot spot extraction is carried out with consideration of short turn-around-time (TAT), accurate extraction and convenient functions such as hot spot for interlayers. Hot spot monitoring is achieved with tolerance-based verification in mask fabrication process and wafer process (lithography and etching). These technology elements were integrated into the actual LSI fabrication flow. The application of this concept to LSI manufacturing could contribute to reduction of total cost, quick TAT and ramp up to volume production.

Date Published: 13 March 2006
PDF: 12 pages
Proc. SPIE 6156, Design and Process Integration for Microelectronic Manufacturing IV, 61560N (13 March 2006); doi: 10.1117/12.656418

Published in SPIE Proceedings Vol. 6156:
Design and Process Integration for Microelectronic Manufacturing IV
Alfred K. K. Wong; Vivek K. Singh, Editor(s)