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Proceedings Paper

Product and tool control using integrated auto-macro defect inspection in the photolithography cluster
Author(s): Vinayan C. Menon; Robert L. Isaacson; Matthew C. Nicholls; Stephen J. Lickteig; Thomas Forstner; Anthony R. Barnett; James Mulhall
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Paper Abstract

This paper discusses the controls benefit accomplished on both product wafers and process tools at IBM's 300mm wafer manufacturing line by using integrated auto-macro defect inspection in all the photolithography tool clusters for after-develop-inspection (ADI). Inspection is supported on all production wafers (with possibility to sample wafers if desired). To get to this level of control the overall 'ADI process' in the line had to be first rendered manufacturable. Therefore, significant effort had to be focused towards decreasing false fails and nuisance holds. As a result, over the last year inspection software related false fails were reduced 3X, hardware related PC communication fails were decreased 5X, and fab automation related nuisance wafer holds were reduced 12X. Fail rate has been sustainable at 6% (± 2%) for over two quarters. At this point only 20% of the fail rate is false and is mostly attributable to hardware related wafer alignment issues during inspection. By decreasing false fails and hold rates, sensitivity and effectiveness in the line towards correctly reacting to real fail signals significantly improved. Product wafers with real fails are now consistently reacted to real-time in the line leading to rework and elimination of photo sector generated macro defects. Contribution of this integrated metrology system to fab rework rate in eliminating yield impacting macro defects from product wafers, as well as examples of captured defects that have identified several process tool problems are also presented. Majority of rework contributors are defects generated from intermittent photo process tool issues that randomly occur and disappear (versus systematic process tool issues that typically end up being flagged within two consecutive failed lots). Typically 0.5 to 1% of the ADI inspected wafers get reworked for macro defectivity translating to a significant number of wafers - thus justifying ADI return-on- investment. Note that real fails as a result of defectivity propagation from prior photolevels - estimated at 15% of the fail rate, do not get reworked. Additionally, real fails determined to be non-reworkable as a result of defectivity from the current photolevel - estimated at 50% of the fail rate, also do not get reworked. Further, by analyzing real fails for intra/inter wafer signatures systematic process tool issues are being consistently flagged on the line. Overall, ADI at IBM's 300mm wafer fab has evolved into a real-time wafer level go/no-go control for both product and process tools.

Paper Details

Date Published: 24 March 2006
PDF: 9 pages
Proc. SPIE 6152, Metrology, Inspection, and Process Control for Microlithography XX, 61521R (24 March 2006); doi: 10.1117/12.656394
Show Author Affiliations
Vinayan C. Menon, IBM Microelectronics (United States)
Robert L. Isaacson, IBM Microelectronics (United States)
Matthew C. Nicholls, IBM Microelectronics (United States)
Stephen J. Lickteig, Tokyo Electron America, Inc. (United States)
Thomas Forstner, Tokyo Electron America, Inc. (United States)
Anthony R. Barnett, Tokyo Electron America, Inc. (United States)
James Mulhall, Tokyo Electron America, Inc. (United States)

Published in SPIE Proceedings Vol. 6152:
Metrology, Inspection, and Process Control for Microlithography XX
Chas N. Archie, Editor(s)

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