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Proceedings Paper

Gas-phase fluorination of resist for improving line-end pullback during etch
Author(s): Richard D. Peters; Patrick K. Montgomery; Phillip J. Stout
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Paper Abstract

Line-end pullback has been an issue for photoresist patterning for many years. The two-dimensional nature of line-ends leads to increased deprotection of the resist and shortening of the resist features. From a lithographic standpoint, line-end pullback can be mitigated to some extent using optical proximity correction (OPC). However, as the space between line-ends gets smaller, a trade-off exists with respect to OPC. Over-correction of the line-end on the reticle by the addition of hammerheads can lead to bridging. In some cases, the line-end spacing can actually be less than design rules. The poor aerial image contrast at these line-ends can lead to sloped profiles as well as pullback. The line-end slope depends on the resist contrast, the OPC, and the target line end-to-end space. These sloped line ends lead to increased pullback during the subsequent gate etch process. For gate patterning, a resist trim step is often utilized prior to etching a hardmask and polysilicon. During each etch step the resist line-end is quickly eroded due to the sloped profile. In this paper, we present a novel post-develop processing technique for improving the line-end profile of patterned photoresist. This improvement in the line-end profile results in less pullback during subsequent etch processing. After development, a patterned photoresist film is treated to a gas phase fluorination process. The fluorination process leads to substitution of F for H in the polymer matrix of the resist film, and causes the resist to swell. This swelling causes the line-end profile to become more vertical due to the fact that the base of resist features are anchored to the substrate, and only the top portion of the resist features will swell. This improvement in the line-end profile is shown to reduce line end-to-end spacing by 20-30% after etch. Cross-sectional images show the improvement throughout the partitioned etch process. Simulation results verify that a more vertical line-end slope is sufficient to decrease line-end pullback during etch.

Paper Details

Date Published: 29 March 2006
PDF: 11 pages
Proc. SPIE 6153, Advances in Resist Technology and Processing XXIII, 61532X (29 March 2006); doi: 10.1117/12.654879
Show Author Affiliations
Richard D. Peters, Freescale Semiconductor, Inc. (United States)
Patrick K. Montgomery, Freescale Semiconductor, Inc. (United States)
Phillip J. Stout, Freescale Semiconductor, Inc. (United States)

Published in SPIE Proceedings Vol. 6153:
Advances in Resist Technology and Processing XXIII
Qinghuang Lin, Editor(s)

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