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Proceedings Paper

Silicon dry etching profile control by RIE at room temperature for MEMS applications
Author(s): D. Vrtacnik; D. Resnik; U. Aljancic; M. Mozek; S. Amon
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Paper Abstract

Work is focused on the study and control of anisotropic silicon etching profiles by using conventional room temperature RIE system with SF6/O2 chemistry. The main process parameters of etching are considered in order to achieve high etching rate, high anisotropy, high aspect ratio, good selectivity, and all this achieved with good homogeneity and repeatability. High anisotropic etching profile, resulting in undercut less than 1.5 μm, aspect ratio higher than 10 and selectivity to oxide of 80 are obtained for 40 μm depth and 3.5 μm wide squared etched pillars. We determined that 29 % content of oxygen in total gas flow is optimal. Silicon and oxide etching rate and selectivity in dependence of total gas flow and gas flow ratio were investigated. Typically, silicon etching rate of 1.6 μm/min, oxide etching rate of 20 nm/min and selectivity of 80 were obtained. Due to the effect of load dependency of etching process, empirical dependence between load and etching rate was determined. Positive RIE lag is observed at etching high aspect ratio trenches. Etched trenches of 6 μm width (aspect ratio less than 7) revealed negligible influence of pressure on aspect ratio dependent etching, for etching performed at pressure 60 or 100 mtorr.

Paper Details

Date Published: 3 January 2006
PDF: 8 pages
Proc. SPIE 6037, Device and Process Technologies for Microelectronics, MEMS, and Photonics IV, 603720 (3 January 2006);
Show Author Affiliations
D. Vrtacnik, Univ. of Ljubljana (Slovenia)
D. Resnik, Univ. of Ljubljana (Slovenia)
U. Aljancic, Univ. of Ljubljana (Slovenia)
M. Mozek, Univ. of Ljubljana (Slovenia)
S. Amon, Univ. of Ljubljana (Slovenia)

Published in SPIE Proceedings Vol. 6037:
Device and Process Technologies for Microelectronics, MEMS, and Photonics IV
Jung-Chih Chiao; Andrew S. Dzurak; Chennupati Jagadish; David V. Thiel, Editor(s)

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