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Proceedings Paper

FPGA chip performance improvement with gate shrink through alternating PSM 90nm process
Author(s): Chun-Chi Yu; Ming-Feng Shieh; Erick Liu; Benjamin Lin; Jonathan Ho; Xin Wu; Petrisor Panaite; Manoj Chacko; Yunqiang Zhang; Wen-Kang Lei
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Paper Abstract

In the post-physical verification space called 'Mask Synthesis' a key component of design-for-manufacturing (DFM), double-exposure based, dark-field, alternating PSM (Alt-PSM) is being increasingly applied at the 90nm node in addition with other mature resolution enhancement techniques (RETs) such as optical proximity correction (OPC) and sub-resolution assist features (SRAF). Several high-performance IC manufacturers already use alt-PSM technology in 65nm production. At 90nm having strong control over the lithography process is a critical component in meeting targeted yield goals. However, implementing alt-PSM in production has been challenging due to several factors such as phase conflict errors, mask manufacturing, and the increased production cost due to the need for two masks in the process. Implementation of Alt-PSM generally requires phase compliance rules and proper phase topology in the layout and this has been successful for the technology node with these rules implemented. However, this may not be true for a mature, production process technology, in this case 90 nm. Especially, in the foundry-fabless business model where the foundry provides a standard set of design rules to its customers for a given process technology, and where not all the foundry customers require Alt-PSM in their tapeout flow. With minimum design changes, design houses usually are motivated by higher product performance for the existing designs. What follows is an in-depth review of the motivation to apply alt-PSM on a production FPGA, the DFM challenges to each partner faced, its effect on the tapeout flow, and how design, manufacturing, and EDA teams worked together to resolve phase conflicts, tapeout the chip, and finally verify the silicon results in production.

Paper Details

Date Published: 9 November 2005
PDF: 13 pages
Proc. SPIE 5992, 25th Annual BACUS Symposium on Photomask Technology, 59925A (9 November 2005); doi: 10.1117/12.637426
Show Author Affiliations
Chun-Chi Yu, UMC (Taiwan)
Ming-Feng Shieh, UMC (Taiwan)
Erick Liu, UMC (Taiwan)
Benjamin Lin, UMC (Taiwan)
Jonathan Ho, Xilinx Inc. (United States)
Xin Wu, Xilinx Inc. (United States)
Petrisor Panaite, Synopsys, Inc. (United States)
Manoj Chacko, Synopsys, Inc. (United States)
Yunqiang Zhang, Synopsys, Inc. (United States)
Wen-Kang Lei, Synopsys, Inc. (United States)

Published in SPIE Proceedings Vol. 5992:
25th Annual BACUS Symposium on Photomask Technology
J. Tracy Weed; Patrick M. Martin, Editor(s)

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