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Proceedings Paper

Transient electro-thermal investigations of interconnect structures exposed to mechanical stress
Author(s): Stefan Holzer; Christian Hollauer; Hajdin Ceric; Stephan Wagner; Erasmus Langer; Tibor Grasser; Siegfried Selberherr
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Paper Abstract

Investigations of state-of-the-art integrated circuit designs clearly show that the temperature in interconnect structures is becoming the dominant and straitening factor for system performance. In this work we combine three-dimensional transient electro-thermal simulations with a finite element formulation of the thermo-mechanical stress problem in order to study the evolution and development of mechanical stress in complex layered interconnect structures at different operating conditions.

Paper Details

Date Published: 30 June 2005
PDF: 8 pages
Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); doi: 10.1117/12.608414
Show Author Affiliations
Stefan Holzer, Technical Univ. of Vienna (Austria)
Christian Hollauer, Technical Univ. of Vienna (Austria)
Hajdin Ceric, Technical Univ. of Vienna (Austria)
Stephan Wagner, Technical Univ. of Vienna (Austria)
Erasmus Langer, Technical Univ. of Vienna (Austria)
Tibor Grasser, Technical Univ. of Vienna (Austria)
Siegfried Selberherr, Technical Univ. of Vienna (Austria)


Published in SPIE Proceedings Vol. 5837:
VLSI Circuits and Systems II
Jose Fco. Lopez; Francisco V. Fernandez; Jose Maria Lopez-Villegas; Jose M. de la Rosa, Editor(s)

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