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Proceedings Paper

New CAD issues and considerations for the design of mixed-signal SOCs
Author(s): William Kao; Susan Zhang
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Paper Abstract

By 2006, close to 75% of system on a chip (SOC) designs will be mixed-signal in nature with digital, analog and possibly RF circuitry all integrated on a single chip. This paper will cover recommended design flows and the design methodology challenges facing current mixed signal SOC designers. It also addresses the CAD tool interoperability issues for these types of mixed-signal designs and identifies the work and solution that need to be done to enable their fast design turnaround.

Paper Details

Date Published: 30 June 2005
PDF: 10 pages
Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); doi: 10.1117/12.607895
Show Author Affiliations
William Kao, Cadence Design Systems, Inc. (United States)
Susan Zhang, Cadence Design Systems, Inc. (United States)

Published in SPIE Proceedings Vol. 5837:
VLSI Circuits and Systems II
Jose Fco. Lopez; Francisco V. Fernandez; Jose Maria Lopez-Villegas; Jose M. de la Rosa, Editor(s)

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