Share Email Print

Proceedings Paper

Design and simulation of an embedded DRAM cell made up of MOSFETs having alternative gate dielectrics
Author(s): N. Konofaos; Th. Voilas; G. Ph. Alexiou
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

Design and construction of new sub-micron MOSFETs with alternative gate dielectrics has emerged as a new technology for use in high-performance logic or low power memory circuits. The modelling of the new devices needs to take into account the effects that the new dielectrics have on the MOS device performance. In this paper, we examine such effects in terms of both capacitance and leakage current effects. First, we investigate the role of the parasitic capacitances appearing at the MOS device due to either material related processes or metallization. These capacitances are modelled accordingly in order to derive the device characteristics. Then, leakage currents are taken into account and the whole device is simulated using a 90 nm technology based on the BSIM4 model equations, suitably modified to account for these effects. The application of such devices on memory circuits is examined in order to take into account device parameters such as the threshold voltage, ouput currents and timing. As a result, the design of an embedded DRAM based on the MOSFETs with the alternative gate dielectrics is presented and analysed. The single MOSFET behaviour and subsequently the DRAM circuit performance are presented and the relevant characteristics are derived. As a result, the simulation revealed low output currents for the MOSFETs and high refresh rates for the DRAM circuits. Deviations from the ideal case are examined and solutions and further work are proposed.

Paper Details

Date Published: 30 June 2005
PDF: 7 pages
Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); doi: 10.1117/12.607757
Show Author Affiliations
N. Konofaos, Univ. of Patras (Greece)
Research Academic Computer Technology Institute (Greece)
Th. Voilas, Univ. of Patras (Greece)
Research Academic Computer Technology Institute (Greece)
G. Ph. Alexiou, Univ. of Patras (Greece)
Research Academic Computer Technology Institute (Greece)

Published in SPIE Proceedings Vol. 5837:
VLSI Circuits and Systems II
Jose Fco. Lopez; Francisco V. Fernandez; Jose Maria Lopez-Villegas; Jose M. de la Rosa, Editor(s)

© SPIE. Terms of Use
Back to Top
Sign in to read the full article
Create a free SPIE account to get access to
premium articles and original research
Forgot your username?