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Proceedings Paper

Improving model-based OPC performance for the 65-nm node through calibration set optimization
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Paper Abstract

As lithography continues to increase in difficulty with low k1 factors, and ever-tighter process margins, model-based optical proximity correction (OPC) is being used for the majority of patterning layers. As a result, the engineering effort consumed by the development and calibration of OPC models is continuing to increase at an alarming rate. One of the major focal points of this effort is the increasing emphasis on improving the accuracy of the model-based OPC corrections. One of the major contributors to final OPC accuracy is the quality of the resist model. As a result of these trends, the number of sample points used to calibrate OPC models is increasing rapidly from generation to generation. However, this increase is largely due to an antiquated approach to the construction of these calibration sets, focusing on structure variations. In this study, a new approach to the calibration of a resist model will be proposed based upon the location of calibration structures within the actual resist space over which the resist model is expected to be predictive.

Paper Details

Date Published: 5 May 2005
PDF: 8 pages
Proc. SPIE 5756, Design and Process Integration for Microelectronic Manufacturing III, (5 May 2005); doi: 10.1117/12.601166
Show Author Affiliations
Kyle Patterson, Freescale Semiconductor (France)
Yorick Trouiller, CEA-LETI (France)
Kevin Lucas, Freescale Semiconductor (France)
Jerome Belledent, Philips Semiconductors (France)
Amandine Borjon, Philips Semiconductors (France)
Yves Rody, Philips Semiconductors (France)
Christophe Couderc, Philips Semiconductors (France)
Frank Sundermann, STMicroelectronics (France)
Jean-Christophe Urbani, STMicroelectronics (France)
Stanislas Baron, STMicroelectronics (France)

Published in SPIE Proceedings Vol. 5756:
Design and Process Integration for Microelectronic Manufacturing III
Lars W. Liebmann, Editor(s)

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