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Proceedings Paper

Alignment robustness for 90 nm and 65 nm node through copper alignment mark integration optimization
Author(s): Scott Warrick; Paul Hinnen; Rob Morton; Kevin Cooper; Pierre-Olivier Sassoulas; Jerome Depre; Ramon Navarro; Richard van Haren; Clyde Browning; Doug Reber; Henry Megens
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Paper Abstract

In this paper, methods for stacking ASML scribe lane alignment marks (SPM) and improving the mark performance at initial copper metal levels are discussed. The new mark designs and the theoretical reasons for mark design and/or integration change are presented. In previous joint publications between ASML and Freescale Semiconductor [1], improved overlay performance and alignment robustness for Back End Of Line (BEOL) layers by the application of stacked scribe lane marks (SPM) was presented. In this paper, further improvements are demonstrated through the use of optimized Versatile Scribe Lane Mark design (VSPM). With the application of stacked optimized VSPM-marks, the alignment signal strength of marks in the copper metal layer is increased compared to stacked SPM marks. The gains in signal strength stability, which is typical for stacked marks, as well as significantly reduced scribe lane usage, are also maintained. Through the placement of specially designed orthogonal scatter-bars in selected layers under the VSPM-marks, the alignment performance of initial inlaid metal layers is improved as well. The integration of these marks has been evaluated for the 90 nm and 65 nm technology nodes as part of a joint development program between the Crolles2 Alliance and ASML. A measured overlay improvement of ~10-15% was obtained by a strategy change from floating copper marks to stacked optimized VSPM marks.

Paper Details

Date Published: 12 May 2005
PDF: 11 pages
Proc. SPIE 5754, Optical Microlithography XVIII, (12 May 2005); doi: 10.1117/12.599807
Show Author Affiliations
Scott Warrick, Freescale Semiconductor (France)
Paul Hinnen, ASML (Netherlands)
Rob Morton, Philips Semiconductors (France)
Kevin Cooper, Freescale Semiconductor (France)
Pierre-Olivier Sassoulas, STMicroelectronics (France)
Jerome Depre, ASML (Netherlands)
Ramon Navarro, ASML (Netherlands)
Richard van Haren, ASML (Netherlands)
Clyde Browning, Freescale Semiconductor (France)
Doug Reber, Freescale Semiconductor (France)
Henry Megens, ASML (Netherlands)

Published in SPIE Proceedings Vol. 5754:
Optical Microlithography XVIII
Bruce W. Smith, Editor(s)

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