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Proceedings Paper

Pattern recognition algorithms for linewidth measurement
Author(s): Hamid K. Aghajan; Charles D. Schaper; Thomas Kailath
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Paper Abstract

Novel edge detection and line fitting pattern recognition algorithms are applied for linewidth measurement on images of integrated circuits. The strategy employs a two step procedure. In the first step, a neural network is used for edge detection of the image. Three neural network approaches are investigated: bootstrap linear threshold, self-organizing, and constrained maximization strategies. These neural networks combine filtering and thresholding to reduce noise and aberrations in the image. Further, the parameters of the neural network are estimated using an unsupervised learning procedure. The advantage of this learning strategy is the ability to adapt to the imaging environment. Consequently, these proposed neural network approaches for edge detection do not require an a priori database of images with known linewidths for calibration. In the second step, new line-fitting methods are applied to the edge maps defined by the neural network to compute linewidth. Two methods are investigated: an eigenvector strategy and a technique that is based on a reformulation of the line-fitting problem such that advanced signal processing techniques can be employed. The latter algorithm is capable of fitting multiple lines in an image which need not be parallel and possesses computational speed superiority over conventional techniques and can be implemented on-line. By employing this two-step strategy, the entire image is used to estimate linewidth as opposed to a single or few line scans. Thus, edge roughness effects can be spatially averaged to obtain an optimal estimate of linewidth. The techniques are general and can be used on images form a variety of microscopes including optical and electron-beam. The pattern recognition algorithms are applied to images of patterned wafers with lines smaller than 1 micrometers wide. These images are obtained by optical microscopes. The estimated linewidths are shown to be in close agreement with those measured by scanning electron microscopes. The application of the proposed pattern recognition techniques to solve other problems in IC metrology, such as rotational wafer alignment, is also discussed.

Paper Details

Date Published: 1 June 1992
PDF: 14 pages
Proc. SPIE 1673, Integrated Circuit Metrology, Inspection, and Process Control VI, (1 June 1992); doi: 10.1117/12.59786
Show Author Affiliations
Hamid K. Aghajan, Stanford Univ. (United States)
Charles D. Schaper, Stanford Univ. (United States)
Thomas Kailath, Stanford Univ. (United States)

Published in SPIE Proceedings Vol. 1673:
Integrated Circuit Metrology, Inspection, and Process Control VI
Michael T. Postek Jr., Editor(s)

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