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Proceedings Paper

High-performance image processing architecture
Author(s): Patrick C. Coffield
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Paper Abstract

The proposed architecture is a logical design specifically for image processing and other related computations. The design is a hybrid electro-optical concept consisting of three tightly coupled components: a spatial configuration processor (the optical analog portion), a weighting processor (digital), and an accumulation processor (digital). The systolic flow of data and image processing operations are directed by a control buffer and pipelined to each of the three processing components. The image processing operations are defined by an image algebra developed by the University of Florida. The algebra is capable of describing all common image-to-image transformations. The merit of this architectural design is how elegantly it handles the natural decomposition of algebraic functions into spatially distributed, point-wise operations. The effect of this particular decomposition allows convolution type operations to be computed strictly as a function of the number of elements in the template (mask, filter, etc.) instead of the number of picture elements in the image. Thus, a substantial increase in throughput is realized. The logical architecture may take any number of physical forms. While a hybrid electro-optical implementation is of primary interest, the benefits and design issues of an all digital implementation are also discussed. The potential utility of this architectural design lies in its ability to control all the arithmetic and logic operations of the image algebra's generalized matrix product. This is the most powerful fundamental formulation in the algebra, thus allowing a wide range of applications.

Paper Details

Date Published: 30 April 1992
PDF: 12 pages
Proc. SPIE 1659, Image Processing and Interchange: Implementation and Systems, (30 April 1992); doi: 10.1117/12.58397
Show Author Affiliations
Patrick C. Coffield, Wright Lab. (United States)

Published in SPIE Proceedings Vol. 1659:
Image Processing and Interchange: Implementation and Systems
Ronald B. Arps; William K. Pratt, Editor(s)

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