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Proceedings Paper

Ultralow-power high-resolution ADC for biomedical applications
Author(s): Lingraj Hiremath; Vinay Mallapur; Aleksandar Stojcevski; Jugdutt Singh; Hai Phuong Le; Aladin Zayegh
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Paper Abstract

This paper presents a fully differential ultra low power successive approximation (SA) Analog-to-digital converter (ADC) for biomedical application. In order to reduce the system power consumption, the building block components of the SA ADC architecture has been optimised. In addition, the ADC the input voltage swing is scaled down to in order to reduce the slope gain error and the nonlinearity errors. The SA ADC has been implemented in Cadence Analog Design Environment using 0.18-micron CMOS technology. The designed SA ADC operates at a sampling rate of 200S/s at 3V power supply and consumes only 12µW of power at this frequency. The ADC standby power consumption is less than 1µW. The designed 16-bit ADC occupies an area of 0.1 mm2 and is the smallest in size among its 16-bit counter parts reported in the literature. The proposed 16-bit ADC achieves the differential-non-linearity (DNL) and integral-non-linearity errors (INL) of ± 0.5 LSB and ± 0.3 LSB respectively.

Paper Details

Date Published: 28 February 2005
PDF: 8 pages
Proc. SPIE 5649, Smart Structures, Devices, and Systems II, (28 February 2005); doi: 10.1117/12.582276
Show Author Affiliations
Lingraj Hiremath, Victoria Univ. (Australia)
Vinay Mallapur, Victoria Univ. (Australia)
Aleksandar Stojcevski, Victoria Univ. (Australia)
Jugdutt Singh, Victoria Univ. (Australia)
Hai Phuong Le, Victoria Univ. (Australia)
Aladin Zayegh, Victoria Univ. (Australia)

Published in SPIE Proceedings Vol. 5649:
Smart Structures, Devices, and Systems II
Said F. Al-Sarawi, Editor(s)

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