Share Email Print

Proceedings Paper

Design and analysis of real-time wavefront processor
Author(s): Luchun Zhou; Chunhong Wang; Mei Li; Wenhan Jiang
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

Latency of wavefront processor is an important factor of closed loop adaptive optical systems. For an adaptive optical system using Shack-Hartmann wave-front sensing and point beam, by ways of task queue, subtask arithmetic decomposition and subtask structure design, a multi-processors structure based on moder parallelism theory is built to realize a pipeline of wavefront gradient, wavefront reconstruction and wavefront control. By traits of field programmable gate array(FPGA) and digital signal processor(DSP), a pipeline wavefront processor based on FPGA+DSP structure is built with highly real-time performance. Clocks of FPGA and DSP, “age” of correctors are primary sources of this wavefront processor’s latency. For a 61-element adaptive optical system whose sampling frequency is 2900HZ, latency of this wavefront processor is less than 100us.

Paper Details

Date Published: 23 December 2004
PDF: 6 pages
Proc. SPIE 5639, Adaptive Optics and Applications III, (23 December 2004); doi: 10.1117/12.580431
Show Author Affiliations
Luchun Zhou, Institute of Optics and Electronics, CAS (China)
Chunhong Wang, Institute of Optics and Electronics, CAS (China)
Mei Li, Institute of Optics and Electronics, CAS (China)
Wenhan Jiang, Institute of Optics and Electronics, CAS (China)

Published in SPIE Proceedings Vol. 5639:
Adaptive Optics and Applications III
Wenhan Jiang; Yoshiji Suzuki, Editor(s)

© SPIE. Terms of Use
Back to Top
Sign in to read the full article
Create a free SPIE account to get access to
premium articles and original research
Forgot your username?