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Proceedings Paper

Methodology for a sub-90nm contact layer OPC with DFM flow demonstration
Author(s): Chi-Yuan Hung; Bin Zhang; Jian Zhang; GuoQiang Xing
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Paper Abstract

Extensive usage of Litho RET, Etch trimming and OPC techniques has become common practice in the integrated patterning flow for 90nm and beyond. In this paper, we will discuss our approach to use OPC for both etch and litho through-pitch bias correction for a 90nm contact layer. In stead of using conventional lumped model, [J.P. Stirniman, M.L. Rieger, SPIE Proc. Optical/Laser Microlithography X, Vol. 3051, p294, 1997], we introduced an alternative modeling approach to reduce our model correction into: Corrected Mask Layout = Tmask-1 (Toptical-1 (Tetch-1 (Design Layout) ) ). Post OPC checking using Synopsys SiVl platform shows that CD 3σ = 7.82nm of through-pitch OPC residual error. This study also shows that integrated patterning flow combined with LRC tools is useful to provide feedback to the designer and highlight some patterning process limitation that is design dependent.

Paper Details

Date Published: 27 January 2005
PDF: 7 pages
Proc. SPIE 5645, Advanced Microlithography Technologies, (27 January 2005); doi: 10.1117/12.572686
Show Author Affiliations
Chi-Yuan Hung, Semiconductor Manufacturing International Corp. (China)
Bin Zhang, Semiconductor Manufacturing International Corp. (China)
Jian Zhang, Semiconductor Manufacturing International Corp. (China)
GuoQiang Xing, Semiconductor Manufacturing International Corp. (China)

Published in SPIE Proceedings Vol. 5645:
Advanced Microlithography Technologies
Yangyuan Wang; Jun-en Yao; Christopher J. Progler, Editor(s)

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