Share Email Print

Proceedings Paper

Physics of overstress-related failures in semiconductor devices
Author(s): M. K. Radhakrishnan; M. Natarajan
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

The effects of extrinsic factors on the reliability and performance of semiconductor devices are significant, especially when these devices are used for critical applications. The major extrinsic factors affecting the performance of devices are electrical overstress (EOS), electrostatic discharge (ESD) and radiation. The failure modes/mechanisms associated with EOS and ESD vary with technologies, device density as well as the failure location. The commonly observed failure modes are open circuit, short circuit, excessive leakage current, reduction in threshold voltage, snap back breakdown, etc., and the failure mechanisms are metallization melting and spiking due to electrothermomigration and Joule heating, junction fusing by second breakdown, dielectric breakdown, etc. In most cases the failures can be catastrophic, whereas latent failures are also possible due to EOS/ESD. Such latent failures are very vulnerable and can lead devices to fail during usage. Here an overview on the study on the physics of failures including that of latent effects induced by EOS and ESD is presented.

Paper Details

Date Published: 1 February 1992
PDF: 9 pages
Proc. SPIE 1523, Conference on Physics and Technology of Semiconductor Devices and Integrated Circuits, (1 February 1992); doi: 10.1117/12.57002
Show Author Affiliations
M. K. Radhakrishnan, Vikram Sarabhai Space Ctr. (India)
M. Natarajan, Univ. of Kerala (India)

Published in SPIE Proceedings Vol. 1523:
Conference on Physics and Technology of Semiconductor Devices and Integrated Circuits
B. S. V. Gopalam; J. Majhi, Editor(s)

© SPIE. Terms of Use
Back to Top