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Proceedings Paper

Photomask quality assessment solution for 90-nm technology node
Author(s): Katsumi Ohira; Dong Hoon Paul Chung; Yoshioka Nobuyuki; Motonari Tateno; Kenichi Matsumura; Jiunn-Hung Chen; Gerard T. Luk-Pat; Norio Fukui; Yoshio Tanaka
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Paper Abstract

As 90 nm LSI devices are about to enter pre-production, the cost and turn-around time of photomasks for such devices will be key factors for success in device production. Such devices will be manufactured with state-of-the-art 193nm photolithography systems. Photomasks for these devices are being produced with the most advanced equipment, material and processing technologies and yet, quality assurance still remains an issue for volume production. These issues include defect classification and disposition due to the insufficient resolution of the defect inspection system at conventional review and classification processes and to aggressive RETs, uncertainty of the impact the defects have on the printed feature as well as inconsistencies of classical defect specifications as applied in the sub-wavelength era are becoming a serious problem. Simulation-based photomask qualification using the Virtual Stepper System is widely accepted today as a reliable mask quality assessment tool of mask defects for both the 180 nm and 130 nm technology nodes. This study examines the extendibility of the Virtual Stepper System to 90nm technology node. The proposed method of simulation-based mask qualification uses aerial image defect simulation in combination with a next generation DUV inspection system with shorter wavelength (266nm) and small pixel size combined with DUV high-resolution microscope for some defect cases. This paper will present experimental results that prove the applicability for enabling 90nm technology nodes. Both contact and line/space patterns with varies programmed defects on ArF Attenuated PSM will be used. This paper will also address how to make the strategy production-worthy.

Paper Details

Date Published: 20 August 2004
PDF: 11 pages
Proc. SPIE 5446, Photomask and Next-Generation Lithography Mask Technology XI, (20 August 2004); doi: 10.1117/12.557734
Show Author Affiliations
Katsumi Ohira, Semiconductor Leading Edge Technologies, Inc. (Japan)
Dong Hoon Paul Chung, Semiconductor Leading Edge Technologies, Inc. (Japan)
Yoshioka Nobuyuki, Semiconductor Leading Edge Technologies, Inc. (Japan)
Motonari Tateno, NEC Corp. (Japan)
Kenichi Matsumura, NEC Corp. (Japan)
Jiunn-Hung Chen, Synopsys, Inc. (United States)
Gerard T. Luk-Pat, Synopsys, Inc. (United States)
Norio Fukui, Synopsys, Inc. (United States)
Yoshio Tanaka, Synopsys, Inc. (United States)

Published in SPIE Proceedings Vol. 5446:
Photomask and Next-Generation Lithography Mask Technology XI
Hiroyoshi Tanabe, Editor(s)

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