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Proceedings Paper

Mathematically describing the target contour in silicon such that model-based OPC can best realize design intent
Author(s): Christopher M. Cork; Pratheep Balasingam; Sonya Sandvik; Bill Kielhorn; Michael L. Rieger
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Paper Abstract

IC layouts are typically defined with simple shapes such as rectangles and 45° triangles. Fundamental limitations in the imaging process unavoidably prevent the exact rendering of these shapes on the wafer, and this necessitates an interpretation of what should appear on silicon. For example, an OPC tool must interpret a square corner as something more rounded, otherwise the pursuit of the ideal shape may lead to bridging and/or Mask Rule Check (MRC) violations. A solution to this is to move the target points for Optical Proximity Correction (OPC) off from the GDS edges and onto mathematically described curves inscribed within the corners of the design polygon and use these as the target for OPC correction. Suitable values for the radius of these curves depend on the model used, the geometry they are applied to, and the requirements of the device the shape builds. An uncorrected square corner gives a printed contour whose radius of curvature, nearest the design corner, provides a target radius for a low impact OPC correction. Line ends, right angled bends in tracks and end caps all need separate optimization in terms of the best radius of target curve to use. By understanding whether the design priority is for CD control (such as poly gate) or for positional accuracy (such as contact enclosure) the OPC correction parameters and final target shape can be modified in such a way to best realize these interpreted goals.

Paper Details

Date Published: 3 May 2004
PDF: 10 pages
Proc. SPIE 5379, Design and Process Integration for Microelectronic Manufacturing II, (3 May 2004); doi: 10.1117/12.538047
Show Author Affiliations
Christopher M. Cork, Synopsys SARL (France)
Pratheep Balasingam, Synopsys, Inc. (United States)
Sonya Sandvik, Synopsys, Inc. (United States)
Bill Kielhorn, Synopsys, Inc. (United States)
Michael L. Rieger, Synopsys, Inc. (United States)

Published in SPIE Proceedings Vol. 5379:
Design and Process Integration for Microelectronic Manufacturing II
Lars W. Liebmann, Editor(s)

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