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Proceedings Paper

Design of a binary correlator component and its integration in Round-About architecture for real-time motion measurement
Author(s): Julien Dubois; Gerard Jacquet; Guy Motyl; Viktor Fischer; Alain Aubert
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Paper Abstract

In this paper we present a hardware design, built from scalable components named binary correlators, to exploit in real time the high-speed image grabbing in PIV (Particle Image Velocimetry). PIV can produce instantaneous measurements on a full flow field if real time processing can be reached. Thus, a specific hardware system is required. This hardware system is designed to allow the component scalability by using hardware templates which is grouped to form a binary correlator. Moreover, binary correlators are suitable as processing units and can be integrated in a specific architecture named Round-About. Real time measurement can be attained with only one FPGA.

Paper Details

Date Published: 1 August 2003
PDF: 6 pages
Proc. SPIE 4948, 25th International Congress on High-Speed Photography and Photonics, (1 August 2003); doi: 10.1117/12.516951
Show Author Affiliations
Julien Dubois, Univ. Jean Monnet (France)
Gerard Jacquet, Univ. Jean Monnet (France)
Guy Motyl, Univ. Jean Monnet (France)
Viktor Fischer, Univ. Jean Monnet (France)
Alain Aubert, Univ. Jean Monnet (France)

Published in SPIE Proceedings Vol. 4948:
25th International Congress on High-Speed Photography and Photonics
Claude Cavailler; Graham P. Haddleton; Manfred Hugenschmidt, Editor(s)

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