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Proceedings Paper

Alternating phase shift mask architecture scalability, implementations, and applications for 90-nm and 65-nm technology nodes and beyond
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Paper Abstract

Alternating phase shift mask (altPSM) as a strong resolution enhancement technique is increasingly required to meet the tighter lithographic requirements on gate critical dimension (CD) control, depth of focus and low k1 applications in full chip patterning of logic and memory devices. While the frequency doubling mechanism of altPSM benefits the quality of imaging, the inherent intensity asymmetry between phase shifters, or image imbalance, causes line shift. The effect of mask topography on electromagnetic wave propagation must be compensated in practice. Various designs of mask structure for correcting the intrinsic imaging asymmetry have been extensively studied. In this paper, we discuss several image imbalance correction methods for hidden phase edge altPSM architectures, including chrome undercut, shifter width sizing, sidewall chrome alternating aperture mask. We compared both hidden phase edge as well as exposed phase edge altPSM in terms of scalability, image correction effectiveness, and manufacturability for 90-nm, 65-nm technology nodes and beyond. Specifically, we define the altPSM architecture scalability in terms of three key components: 1. Mask manufacturability, design layout complexity, and effectiveness of image balance correction, 2. Mask patterning resolution, pattern fidelity, image placement, CD & overlay control at both chrome and glass levels, 3. Tightening quartz etch process control for given phase error tolerance. Applications of altPSM technology to line/space, hole, and phase shifted assisted features patterning with various altPSM architectures are also addressed.

Paper Details

Date Published: 28 August 2003
PDF: 12 pages
Proc. SPIE 5130, Photomask and Next-Generation Lithography Mask Technology X, (28 August 2003); doi: 10.1117/12.504391
Show Author Affiliations
Wen-Hao Cheng, Intel Corp. (United States)
Kishore K. Chakravorty, Intel Corp. (United States)
Jeff N. Farnsworth, Intel Corp. (United States)


Published in SPIE Proceedings Vol. 5130:
Photomask and Next-Generation Lithography Mask Technology X
Hiroyoshi Tanabe, Editor(s)

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