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Proceedings Paper

A pipeline memory-efficient programmable architecture for the 2D discrete wavelet transform using lifting scheme
Author(s): Sara Bolouki; Omid Fatemi
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Paper Abstract

In this paper we propose a dedicated architecture to implement a 2-D Discrete Wavelet Transform (DWT) by using the lifting scheme method. The advantages of lifting scheme are lower computational complexity, transforming signal without extension and reduced memory requirement. The proposed architecture is re-configurable for 5/3 and 9/7 filters and employs folded configuration to reduce the hardware cost and achieve higher hardware utilization. The architecture is useful for VLSI implementation and various image- video applications. The design has been modeled by VHDL language and simulated by Modelsim and it is fully synthesizable.

Paper Details

Date Published: 23 June 2003
PDF: 10 pages
Proc. SPIE 5150, Visual Communications and Image Processing 2003, (23 June 2003); doi: 10.1117/12.503183
Show Author Affiliations
Sara Bolouki, Univ. of Tehran (Iran)
Omid Fatemi, Univ. of Tehran (Iran)

Published in SPIE Proceedings Vol. 5150:
Visual Communications and Image Processing 2003
Touradj Ebrahimi; Thomas Sikora, Editor(s)

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