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Proceedings Paper

The spatial-spectral coherent holographic integrating processor (S2-CHIP): performance analysis and 1.0 Gb/s demonstration
Author(s): Kristian D Merkel; Zachary Cole; R. Krishna Mohan; William Randall Babbitt
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Paper Abstract

The design, performance analysis and experimental demonstration for an analog, broadband, high performance electro-optical signal processor are presented. The Spatial Spectral (S2) Coherent Holographic Integrating Processor, or S2-CHIP, has been developed recently as a broadband core-component for range and mid-to-high pulse repetition frequency radar-signal processing systems, as well as for lidar and radio astronomy applications. In a range radar system, if the transmit and receive RF waveforms are modulated onto a stable optical carrier, the S2 material will perform the analog correlation of the transmit and receive signals to yield the target’s range, and also coherent integrate multiple return results to increase the signal-to-noise-ratio and provide for target velocity determination. Preliminary experimental results are shown of S2-CHIP range processing using a 1.0 Gb/s data rate with 512-bit BPSK pulses. Good range resolution is observed for delays up to 1.0 microsecond. The ability of the processor’s to handle dynamic coding on the transmit RF waveforms is demonstrated.

Paper Details

Date Published: 1 July 2003
PDF: 8 pages
Proc. SPIE 4988, Advanced Optical Data Storage, (1 July 2003); doi: 10.1117/12.501103
Show Author Affiliations
Kristian D Merkel, Montana State Univ./Bozeman (United States)
Zachary Cole, Montana State Univ./Bozeman (United States)
R. Krishna Mohan, Montana State Univ./Bozeman (United States)
William Randall Babbitt, Montana State Univ./Bozeman (United States)

Published in SPIE Proceedings Vol. 4988:
Advanced Optical Data Storage
Hans J. Coufal; Alan E. Craig; Zameer U. Hasan, Editor(s)

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