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Proceedings Paper

Iterative current mode per pixel ADC for 3D SoftChip implementation in CMOS
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Paper Abstract

Mobile multimedia communication has rapidly become a significant area of research and development constantly challenging boundaries on a variety of technological fronts. The processing requirements for the capture, conversion, compression, decompression, enhancement, display, etc. of increasingly higher quality multimedia content places heavy demands even on current ULSI (ultra large scale integration) systems, particularly for mobile applications where area and power are primary considerations. The ADC presented in this paper is designed for a vertically integrated (3D) system comprising two distinct layers bonded together using Indium bump technology. The top layer is a CMOS imaging array containing analogue-to-digital converters, and a buffer memory. The bottom layer takes the form of a configurable array processor (CAP), a highly parallel array of soft programmable processors capable of carrying out complex processing tasks directly on data stored in the top plane. This paper presents a ADC scheme for the image capture plane. The analogue photocurrent or sampled voltage is transferred to the ADC via a column or a column/row bus. In the proposed system, an array of analogue-to-digital converters is distributed, so that a one-bit cell is associated with one sensor. The analogue-to-digital converters are algorithmic current-mode converters. Eight such cells are cascaded to form an 8-bit converter. Additionally, each photo-sensor is equipped with a current memory cell, and multiple conversions are performed with scaled values of the photocurrent for colour processing.

Paper Details

Date Published: 21 April 2003
PDF: 7 pages
Proc. SPIE 5117, VLSI Circuits and Systems, (21 April 2003);
Show Author Affiliations
Stefan W. Lachowicz, Edith Cowan Univ. (Australia)
Alexander Rassau, Edith Cowan Univ. (Australia)
Seung-Minh Lee, Dongshin Univ. (South Korea)
Kamran Eshraghian, Edith Cowan Univ. (Australia)
Mike Myung-Ok Lee, Dongshin Univ. (South Korea)

Published in SPIE Proceedings Vol. 5117:
VLSI Circuits and Systems
Jose Fco. Lopez; Juan A. Montiel-Nelson; Dimitris Pavlidis, Editor(s)

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