This paper addresses issues related to multichamber and in-situ processing of heterostructure electronic devices. We discuss the design and operation of two UHV-compatible multichamber systems one designed for one-inch wafers and a second for three-each wafers. Each of these provides: i) substrate introduction via a load-lock chamber ii) surface preparation by a plasma-assisted surface cleaning process iii) thin film deposition of semiconductors and dielectrics by remote plasma enhanced chemical vapor deposition (remote PECVD) iv) surface analysis by Auger electron spectroscopy (AES) and either reflection high energy or low energy electron diffraction (RHEED or LEED) and v) inter-chamber substrate transfer in a UHV compatible environment (1O8 Torr). These systems have been designed exploit the low temperature ( deposition of electronic-quality thin film dielectrics and semiconductors produced by the remote PECVD process. The combination of remote PECVD film deposition coupled with in-vacuo substrate processing has defined processing windows for the formation of heterojunction devices including: i) gate stacks for crystalline silicon c-Si field effect transistors FET''s ii) amorphous silicon a-Si thin film transistors TFT''s and simple TFT circuits and iii) amorphous and microcrystalline sic-Si silicon p-i-n photovoltaic devices. The effectiveness of single-wafer processing is measured by the ability to produce and to maintain electronic-quality interfaces between the various dielectric and semiconductor films that are utilized in these device structures.

Date Published: 1 March 1991
PDF: 12 pages
Proc. SPIE 1392, Advanced Techniques for Integrated Circuit Processing, (1 March 1991); doi: 10.1117/12.48950

Published in SPIE Proceedings Vol. 1392:
Advanced Techniques for Integrated Circuit Processing
James A. Bondur; Terry R. Turner, Editor(s)