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Proceedings Paper

Exposure field size considerations for yield
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Paper Abstract

Maximized use of exposure fields is essential for achieving high stepper throughput rates and high productivity in semiconductor manufacturing. For today’s low-k lithography, very often lens quality is limiting the imaging performance and can eat up overlay budget and allowable CD tolerance. As a result, decreasing yield at extreme slit positions, is a potential danger. Finding an optimum product field size, considering stepper productivity and product yield, is difficult and often based on non-measurable engineering experience. This paper investigates the effect of lens aberrations on misplacement and CD deviations of two critical patterns in a DRAM cell. It can be shown that, depending on the exposure tool, the biggest error can even occur close to the middle of the exposure slit. Also, model calculations based on PMI numbers underestimate the actual overlay degradation. Therefore, smaller exposure fields do not necessarily avoid pitfalls caused by high lens aberrations or other effects resulting in a reduced overlay budget.

Paper Details

Date Published: 26 June 2003
PDF: 6 pages
Proc. SPIE 5040, Optical Microlithography XVI, (26 June 2003);
Show Author Affiliations
Uwe Paul Schroeder, Infineon Technologies AG (Germany)
Gerhard Kunkel, Infineon Technologies AG (Germany)

Published in SPIE Proceedings Vol. 5040:
Optical Microlithography XVI
Anthony Yen, Editor(s)

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