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Investigation of product design weaknesses using model-based OPC sensitivity analysis
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Paper Abstract

Due to the challenging CD control and resolution requirements of future device generations, a large number of complex lithography enhancement techniques are likely to be used for random logic devices. This increased design, reticle, process and OPC complexity must be handled flawlessly by process engineers in order to create working circuits. Additionally, the rapidly increasing cost and cycletime of advanced reticles has increased the urgency of obtaining reticles devoid of process limiting design or OPC errors. We have extended the capability of leading edge model-based OPC software to find and analyze process-limiting regions in real product designs. Specifically, we have implemented and verified software usefulness to find design-process limitations due to measured lens aberrations, as well as errors in focus, exposure or reticle CD control. We present results showing the applications and limitations of these new model-based analysis methods to discover process-design interaction errors in 90nm and 130nm patterning processes; and to propose design rule, process or OPC improvements to mitigate these errors.

Paper Details

Date Published: 10 July 2003
PDF: 12 pages
Proc. SPIE 5042, Design and Process Integration for Microelectronic Manufacturing, (10 July 2003); doi: 10.1117/12.485263
Show Author Affiliations
Sergei V. Postnikov, Motorola, Inc. (United States)
Kevin Lucas, Motorola, Inc. (United States)
Cesar M. Garza, Motorola, Inc. (United States)
Karl Wimmer, Motorola, Inc. (France)
Patrick LaCour, Mentor Graphics Corp. (United States)
James C. Word, Integrated Device Technology, Inc. (United States)

Published in SPIE Proceedings Vol. 5042:
Design and Process Integration for Microelectronic Manufacturing
Alexander Starikov, Editor(s)

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