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Proceedings Paper

Optimized cobalt silicide formation through etch process improvements
Author(s): David S. Tucker; Richard Yang; Heather Maines
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Paper Abstract

Cobalt Silicide (CoSi) is used to reduce contact resistance for sub-micron technology such as 0.25μm CMOS. At National Semiconductor, a thin oxide is used to protect areas that are not be silicided. The selective removal of this oxide to form the silicide mask is critical as it occurs in the highly sensitive cobalt silicide module where neither over nor under etch is acceptable. The final etch uses a low power, CHF2/Ar recipe with good across wafer uniformity. In keeping with the advance dprocess control methodgoy at National, the etch is end pointed to reduce wafer-to-wafer and etch chamber variability. This paper contains integation aspects of the cobalt silicide module as well as the specifics of the new etch process. The effects of power, pressure and gas flows and details of the end point set up are reviewed, as wel as cross section analysis and electrical responses.

Paper Details

Date Published: 10 July 2003
PDF: 7 pages
Proc. SPIE 5042, Design and Process Integration for Microelectronic Manufacturing, (10 July 2003); doi: 10.1117/12.485242
Show Author Affiliations
David S. Tucker, National Semiconductor Corp. (United States)
Richard Yang, Rochester Institute of Technology (United States)
Heather Maines, National Semiconductor Corp. (United States)


Published in SPIE Proceedings Vol. 5042:
Design and Process Integration for Microelectronic Manufacturing
Alexander Starikov, Editor(s)

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