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Proceedings Paper

Yield improvement due to edge shot parameter optimization
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Paper Abstract

Modern photolithography uses wafer steppers to project the image of a given circuit layer from a reticle onto a photoresist-covered wafer. In the sub-wavelength exposure regime (where the imaging wavelength is greater than the feature being imaged) the wafer surface needs to be positioned within a few hundred nanometers of the stepper focal plane to maintain imaging fidelity. Since typical wafer surface flatness variation is far in excess of this, imaging is accomplished by continuously focussing on the wafer surface during the exposure operation. For 'edge shots', where the centre of the stepper field gets close to the wafer edge, the focussing challenge gets very severe due to increasing wafer flatness variation. The focussing position is determined from the top surface of the resist. However at the edge of the wafer the resist thickness is not uniform, due to effects of the wafer edge bead. This leads to errors in the correct focus offset value been picked to place the wafer surface position within a few hundred nanometers of the stepper focus plane. These variations have a direct impact on yield, especially in sub- wavelength processes, and effects a sizeable proportion of the wafer surface area. This paper describes the yield improvement activities under taken on an i-line 0.35um BiCMOS process. This work comprises of three main parts. The first area investigated, was the changing resist thickness profile at the edge of the wafer.

Paper Details

Date Published: 2 June 2003
PDF: 9 pages
Proc. SPIE 5038, Metrology, Inspection, and Process Control for Microlithography XVII, (2 June 2003); doi: 10.1117/12.485013
Show Author Affiliations
Owen Joyce, Analog Devices B.V. (Ireland)
James Thompson, Analog Devices B.V. (Ireland)
Shane Geary, Analog Devices B.V. (Ireland)


Published in SPIE Proceedings Vol. 5038:
Metrology, Inspection, and Process Control for Microlithography XVII
Daniel J. Herr, Editor(s)

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