Share Email Print

Proceedings Paper

Cross-sectional gate feature identification method using top-down SEM images
Author(s): Maki Tanaka; Chie Shishido; Yuji Takagi; Hidetoshi Morokuma; Osamu Komuro; Hiroyoshi Mori
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

This study presents a method of extracting 3D metrological information for etched gate structures from top-down SEM images for use in critical dimension analysis. The variations in sidewall angle and bottom corner roundness are quantified as feature indices by multiple parameter profile characterization (MPPC), and are used as the main indicators of device performance. A stable algorithm developed based on simulation and experimental results partitions the SEM image signal into the sidewall and footing based on the first derivative of the image signal. The width of the sidwall is used as an index of the sidewall angle, and the width of the footing is used as an index of the footing roundness. The validity of the MPPC method is confirmed through experiments using actual poly-Si gate wafers, and is shown to have a 3σ accuracy of ±0.9° for sidewall angles deviating by mroe than 2°. The sidewall angle index and its distribution map are useful for evaluating the etching process, and are particularly effective for revealing subtle macro variations like asymmetry, while the footing roundness index is useful for screening out bad wafers. As MPPC employs only top-down SEM images, no throughput loss will be incurred in comparison with conventional CD measurements.

Paper Details

Date Published: 2 June 2003
PDF: 12 pages
Proc. SPIE 5038, Metrology, Inspection, and Process Control for Microlithography XVII, (2 June 2003); doi: 10.1117/12.483685
Show Author Affiliations
Maki Tanaka, Hitachi, Ltd. (Japan)
Chie Shishido, Hitachi, Ltd. (Japan)
Yuji Takagi, Hitachi, Ltd. (Japan)
Hidetoshi Morokuma, Hitachi High-Technologies Corp. (Japan)
Osamu Komuro, Hitachi High-Technologies Corp. (Japan)
Hiroyoshi Mori, Hitachi High-Technologies Corp. (Japan)

Published in SPIE Proceedings Vol. 5038:
Metrology, Inspection, and Process Control for Microlithography XVII
Daniel J. Herr, Editor(s)

© SPIE. Terms of Use
Back to Top
Sign in to read the full article
Create a free SPIE account to get access to
premium articles and original research
Forgot your username?