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Proceedings Paper

Display bandwidth reduction via latched pixels and processing at the pixel
Author(s): Bruce Gnade; A. Akinwande; Ranganathan Shashidhar; James O. Larimer
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Paper Abstract

The demand for displays with a large number of pixels is being driven by both military and commercial applications. Displays with very high information content are expected to have >1Gigapixels, requiring I/O bandwidth well beyond current integrated circuit technology, if display architectures continue as they have in the past. In this paper we present a concept based on latched pixels and data processing at the pixel level that could provide a significant reduction in display bandwidth.

Paper Details

Date Published: 28 August 2002
PDF: 5 pages
Proc. SPIE 4712, Cockpit Displays IX: Displays for Defense Applications, (28 August 2002); doi: 10.1117/12.480931
Show Author Affiliations
Bruce Gnade, Univ. of North Texas (United States)
A. Akinwande, Massachusettes Institute of Technology (United States)
Ranganathan Shashidhar, Naval Research Lab. (United States)
James O. Larimer, NASA Ames Research Ctr. (United States)

Published in SPIE Proceedings Vol. 4712:
Cockpit Displays IX: Displays for Defense Applications
Darrel G. Hopper, Editor(s)

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