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Application of lithography simulation in reticle inspection
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Paper Abstract

Optical lithography simulation plays a decisive role in the development of technology for the manufacturing process of semiconductor devices. Its role in reticle inspection has only recently gained more attention. Filters determining which defects need repair and which ones can be ignored help set up the filter classes in inspection systems. These calculations are performed offline. In an effort to increase the accuracy of inspection it would be desirable to place the decision level as close to the actual process as possible. Therefore, an inspection system based on aerial images is a step in this direction. In addition, an optical simulator calculates from the aerial image the resist image. To do so very fast resist image models are needed (see figure 7). Quick models so far were restricted by accuracy and speed. In this paper a new very fast model will be presented that allows calculation of large areas suitable for inspection purposes. Finally a 'virtual inspection' system will be presented pinpointing at weak spots in the layout. In an effort to calculate larger areas of the resist in less time we had to take completely new approaches. They led us to analytical descriptions of the image transfer into the resist. Within these descriptions we begin in this first paper to investigate an approach based on the propagation of a top aerial image into the resist. The aerial image may come from calculations, as in the present article, or as well from measurements. The purpose of this article is to demonstrate the performance of the Fast Resist Model with respect to accuracy and time consumption. The limits of the current model are equally described.

Paper Details

Date Published: 16 August 2002
PDF: 9 pages
Proc. SPIE 4764, 18th European Conference on Mask Technology for Integrated Circuits and Microcomponents, (16 August 2002); doi: 10.1117/12.479362
Show Author Affiliations
Christian K. Kalus, Sigma-C (Germany)
Robert Wildfeuer, Sigma-C (Germany)

Published in SPIE Proceedings Vol. 4764:
18th European Conference on Mask Technology for Integrated Circuits and Microcomponents
Uwe F. W. Behringer, Editor(s)

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