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Proceedings Paper

Linear interconnection architecture in parallel implementation of neural network models
Author(s): M. Taghi Mostafavi
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Paper Abstract

An architecture for VLSI/ULSI implementation of neural network models is presented. The architecture is of the linear and systolic type and can easily be expanded to a larger network size with more processing elements per layer and/or more layers per network model. The weights in this architecture are fully adjustable. The weights must be pre-computed with the help of a host computer and downloaded to the system as a preinitialized process. This architecture is basically suitable for feed forward neural network architecture. 1.

Paper Details

Date Published: 1 March 1991
PDF: 9 pages
Proc. SPIE 1396, Applications of Optical Engineering: Proceedings of OE/Midwest '90, (1 March 1991); doi: 10.1117/12.47757
Show Author Affiliations
M. Taghi Mostafavi, Univ. of North Carolina/Charlotte (United States)


Published in SPIE Proceedings Vol. 1396:
Applications of Optical Engineering: Proceedings of OE/Midwest '90
Rudolph P. Guzik; Hans E. Eppinger; Richard E. Gillespie; Mary Kathryn Dubiel; James E. Pearson, Editor(s)

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