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Proceedings Paper

Novel procedure for mask disposition using electrical signatures of mask defects
Author(s): Artur P. Balasinski; Walter Iandolo; Oindrila Ray; Linard Karklin; Valery Axelrad
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Paper Abstract

Inspection and repair are increasingly more important components of the mask building process. Mask writing complexity and time make it necessary to accept plates containing defects such as line protrusions, particles, or voids. These defects are identified by a number of inspection tools, which should make it possible to distinguish between 'killer' and 'nuisance' defects. In the most advanced defect printability studies, a 10 percent linewidth (CD) variation in critical areas across process window are used to evaluate defect severity. This emphasizes defect printability for manufacturing rather than product functionality. In this work, we propose a simulation procedure that goes one step further towards product yield, by evaluating the impact of mask defects on device parameters. It first defines silicon image, followed by the identification of defects that actually degrade device characteristics beyond the limits specified for the product. The procedure involves simulated transistor characteristics based on its geometries and models, with drive and leakage currents used as the qualifying parameters.

Paper Details

Date Published: 1 August 2002
PDF: 8 pages
Proc. SPIE 4754, Photomask and Next-Generation Lithography Mask Technology IX, (1 August 2002); doi: 10.1117/12.477005
Show Author Affiliations
Artur P. Balasinski, Cypress Semiconductor (United States)
Walter Iandolo, Cypress Semiconductor (United States)
Oindrila Ray, Cypress Semiconductor (United States)
Linard Karklin, Numerical Technologies, Inc. (United States)
Valery Axelrad, Sequoia Design Systems, Inc. (United States)

Published in SPIE Proceedings Vol. 4754:
Photomask and Next-Generation Lithography Mask Technology IX
Hiroichi Kawahira, Editor(s)

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