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Proceedings Paper

Quantification of OPC performance of 150-nm gates using top-down CD-SEM
Author(s): Ashesh Parikh; Haiqing Zhou; Chih-Yu Wang; Craig W. MacNaughton
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Paper Abstract

Optical proximity correction using both model-based and selective size adjust techniques was used as means to correct the distortion of patterns in silicon from drawn data. The performance of these corrections on silicon was evaluated using top-down SEM for both active area and gate wafers post-pattern and post-etch steps. Figure of merit such as corner rounding radius and line-edge roughness were measured. By overlapping the drawn data to the processed image, metric such as overlapping area and critical shape difference were extracted. This resulted in a range of metrics that quantified the performance of the proximity correction that was applied on the mask with reference to drawn data.

Paper Details

Date Published: 16 July 2002
PDF: 6 pages
Proc. SPIE 4689, Metrology, Inspection, and Process Control for Microlithography XVI, (16 July 2002); doi: 10.1117/12.473489
Show Author Affiliations
Ashesh Parikh, Texas Instruments Inc. (United States)
Haiqing Zhou, Texas Instruments Inc. (United States)
Chih-Yu Wang, KLA-Tencor Corp. (United States)
Craig W. MacNaughton, KLA-Tencor Corp. (United States)

Published in SPIE Proceedings Vol. 4689:
Metrology, Inspection, and Process Control for Microlithography XVI
Daniel J. C. Herr, Editor(s)

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