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Proceedings Paper

Compensation of resist trim process and polygate plasma microloading effect for lithography process window and CD uniformity improvement
Author(s): Kay Ming Lee; Cheng Wen Fan; H T Chuang; Jiunn-Ren Huang; Chih Chiang Liu; Kuej Chun Hung
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Paper Abstract

Poly-gate critical dimension (CD) control has become a major concern as technology advances towards the 130nm node. The presence of optical proximity and plasma microloading effects in today's IC fabrication has a severe impact on through-pitch CD uniformity. Poor through-pitch CD uniformity causes a large intra-die CD variation and degrades device performance. Optical proximity effect can be corrected by available optical proximity correction (OPC) software. Plasma microloading effect was normally compensated at 180nm technology node by changing optical proximity behavior. This technique usually degrades the lithography process window such as the depth-of-focus (DOF). At 130nm technology node, this technique becomes impractical as lithography process window is already marginal. To ensure a sufficient lithography process window at 130nm node and beyond, it is very important to separate the plasma microloading effect from optical proximity effects. Plasma microloading effect by itself cannot be removed without any compensating mechanisms. Here, the micro-loading effect of resist trimming was employed as a compensating mechanism. Through-pitch-trim-bias of resist trimming process can be adjusted such that it compensates the through-pitch-etch-bias of poly-gate etching. By controlling the microloading of resist trimming, an improved overall through-pitch CD uniformity (trim plus poly etch) can be achieved. Without any compensating method, a 15nm after etched CD difference between the isolated and dense features is normally seen. By employing the resist trimming compensation method, after etched CD difference between isolated and dense features can be reduced to less than 8nm. This improvement does not bring about any degradation to the lithography process window.

Paper Details

Date Published: 16 July 2002
PDF: 10 pages
Proc. SPIE 4689, Metrology, Inspection, and Process Control for Microlithography XVI, (16 July 2002); doi: 10.1117/12.473429
Show Author Affiliations
Kay Ming Lee, United Microelectronics Corp. (Taiwan)
Cheng Wen Fan, United Microelectronics Corp. (China)
H T Chuang, United Microelectronics Corp. (China)
Jiunn-Ren Huang, United Microelectronics Corp. (United States)
Chih Chiang Liu, United Microelectronics Corp. (Taiwan)
Kuej Chun Hung, United Microelectronics Corp. (China)

Published in SPIE Proceedings Vol. 4689:
Metrology, Inspection, and Process Control for Microlithography XVI
Daniel J. C. Herr, Editor(s)

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