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Proceedings Paper

Reconfigurable optical interconnects for parallel computer systems: design space issues
Author(s): Khoi Bui Viet; Lieven Desmet; Joni Dambre; Dirk Stroobandt; Kristof Beyls; Jan M. Van Campenhout; Hugo Thienpont
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Paper Abstract

In highly parallel computer systems, reconfigurable interconnect network topologies can improve the performance by adaptively increasing the communication bandwidth where it is most needed. In electrical reconfigurable interconnect networks (e.g. crossbars or multi-stage networks), a high reconfigurability can only be achieved at the cost of both chip area and network latency. The facts that short-distance optical link latencies are rapidly decreasing and that new technologies allow optical reconfigurability, make optical interconnects an interesting alternative to overcome these interconnection issues. Optical interconnection technologies indeed offer several possibilities to increase network connectivity without drastically increasing the chip area and the delay costs. In this paper we study the bandwidth and latency requirements of inter-processor and processor-memory interconnect for shared-memory parallel computers when the processor clock increases up to 10 GHz. We also investigate new enabling technologies and discuss their potential use in architectures based on reconfigurable optical interconnects.

Paper Details

Date Published: 15 April 2003
PDF: 11 pages
Proc. SPIE 4942, VCSELs and Optical Interconnects, (15 April 2003); doi: 10.1117/12.471947
Show Author Affiliations
Khoi Bui Viet, Vrije Univ. Brussel (Belgium)
Lieven Desmet, Vrije Univ. Brussel (Belgium)
Joni Dambre, Univ. Gent (Belgium)
Dirk Stroobandt, Univ. Gent (Belgium)
Kristof Beyls, Univ. Gent (Belgium)
Jan M. Van Campenhout, Univ. Gent (Belgium)
Hugo Thienpont, Vrije Univ. Brussel (Belgium)

Published in SPIE Proceedings Vol. 4942:
VCSELs and Optical Interconnects
Hugo Thienpont; Jan Danckaert, Editor(s)

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