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Proceedings Paper

Optical approaches to overcome present limitations for interconnection and control in parallel electronic architectures
Author(s): Thierry Maurin; Francis Devos
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Paper Abstract

Current limitations for interconnection and control in electronic integrated circuits, from the architectural and technological point of view, are presented. Different kinds of interconnection problems within a chip are briefly presented, according to a specific classification. Then, the authors show how they have incorporated optoelectronic devices using a standard CMOS technology to resolve one interconnection problem: the chip clock distribution and control. Some advantages and limitations of this technique used to sequence and control a 8*8 retina are presented. The authors discuss how these experiments, with other techniques used to output data, can provide a possible approach to an optical bus.

Paper Details

Date Published: 1 September 1991
PDF: 8 pages
Proc. SPIE 1505, Optics for Computers: Architectures and Technologies, (1 September 1991); doi: 10.1117/12.47020
Show Author Affiliations
Thierry Maurin, Univ. Paris-Sud (France)
Francis Devos, Univ. Paris-Sud (France)

Published in SPIE Proceedings Vol. 1505:
Optics for Computers: Architectures and Technologies
Guy J. Lebreton, Editor(s)

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