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Proceedings Paper

Mask defect specifications with fail-bit-map analysis
Author(s): Shinji Yamaguchi; Eiji Yamanaka; Hiroyuki Morinaga; Kohji Hashimoto; Takashi Sakamoto; Akira Hamaguchi; Satoru Matsumoto; Osamu Ikenaga; Soichi Inoue
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Paper Abstract

A new mask methodology of mask defect specifications by fail-bit-map (FBM) analysis of LSI devices was proposed. In this paper, concept of new mask defect specifications based on the FBM analysis is shown and impacts on LSI devices of mask defects are studied and the new methodology for next generation is applied. The new mask defect specifications were implemented in a gate-level mask with defects programmed into a 0.175μm-rule DRAM fabrication process, as follows, Firstly, the programmed defects varied in terms of the types, locations and sizes were designed into the memory cell area on the 0.175μm-rule DRAM gate-level mask. Secondly, the gate-level mask with programmed defects was fabricated with conventional mask process flow and the actual mask defect sizes were measured. Thirdly, exposures of the gate-level mask were carried out with conventional 0.175μm-rule DRAM process. Finally, the large impacts on CDs caused by mask defect printability on wafers were clarified and FBM analysis was performed to characterize the relationship among the actual mask defect variations, the CD variations and electrical function of 0.175μm-rule DRAM. This relationship can facilitate determination of the mask defect specifications on 0.175μm-rule DRAM and also likely contribute to estimate next-generation defect specifications. According to the results of the above procedure, the mask defect specifications for opaque defects should be generally tighter than those for clear defects in view of the printability on the wafers and the FBM analysis. Nevertheless, the FBM results suggested that current mask inspection sensitivity for clear defects was too high. With the new methodology, in regard to the impacts of mask defects not only on wafer CDs but also on LSI devices, we have succeeded in obtaining useful results for the mask defect specifications.

Paper Details

Date Published: 27 December 2002
PDF: 10 pages
Proc. SPIE 4889, 22nd Annual BACUS Symposium on Photomask Technology, (27 December 2002); doi: 10.1117/12.467900
Show Author Affiliations
Shinji Yamaguchi, Toshiba Corp. (Japan)
Eiji Yamanaka, Toshiba Corp. (Japan)
Hiroyuki Morinaga, Toshiba Corp. (Japan)
Kohji Hashimoto, Toshiba Corp. (Japan)
Takashi Sakamoto, Toshiba Corp. (Japan)
Akira Hamaguchi, Toshiba Corp. (Japan)
Satoru Matsumoto, Toshiba Corp. (Japan)
Osamu Ikenaga, Toshiba Corp. (Japan)
Soichi Inoue, Toshiba Corp. (Japan)

Published in SPIE Proceedings Vol. 4889:
22nd Annual BACUS Symposium on Photomask Technology
Brian J. Grenon; Kurt R. Kimmel, Editor(s)

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