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Proceedings Paper

LithoScope: simulation-based mask layout verification with physical resist model
Author(s): Qi-De Qian
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Paper Abstract

Simulation based mask layout verification and optimization is a cost effective way to ensure high mask performance in wafer lithography. Because mask layout verification serves as a gateway to the expensive manufacturing process, the model used for verification must have superior accuracy than models used upstream. In this paper, we demonstrate, for the first time, a software system for mask layout verification and optical proximity correction that employs a physical resist development model. The new system, LithoScope, predicts wafer patterning by solving optical and resist processing equations on a scale that is until recently considered unpractical. Leveraging the predictive capability of the physical model, LithoScope can perform mask layout verification and optical proximity correction under a wide range of processing conditions and for any reticle enhancement technology without the need for multiple model development. We show the ability for physical resist model to change iso-focal bias by optimizing resist parameters, which is critical for matching the experimental process window. We present line width variation statistics and chip level process window predictions using a practical cell layout. We show that LithoScope model can accurately describe the resist-intensive poly gate layer patterning. This system can be used to pre-screen mask data problems before manufacturing to reduce the overall cost of the mask and the product.

Paper Details

Date Published: 27 December 2002
PDF: 8 pages
Proc. SPIE 4889, 22nd Annual BACUS Symposium on Photomask Technology, (27 December 2002); doi: 10.1117/12.467780
Show Author Affiliations
Qi-De Qian, IC Scope Co. (United States)

Published in SPIE Proceedings Vol. 4889:
22nd Annual BACUS Symposium on Photomask Technology
Brian J. Grenon; Kurt R. Kimmel, Editor(s)

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