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Proceedings Paper

Optical two-step modified signed-digit addition based on binary logic gates
Author(s): R. S. Fyath; Ala A. W. Alsaffar; Mohammad S. Alam
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Paper Abstract

A new modified signed-digit (MSD) addition algorithm based on binary logic gates is proposed for parallel computing. It is shown that by encoding each of the input MSD digits and flag digits into a pair of binary bits, the number of addition steps can be reduced to two. The flag digit is introduced to characterize the next low order pair (NLOP) of the input digits in order to suppress carry propagation. The rules for two-step addition of binary coded MSD (BCMSD) numbers are formulated that can be implemented using optical shadow-casting logic system.

Paper Details

Date Published: 15 November 2002
PDF: 11 pages
Proc. SPIE 4788, Photonic Devices and Algorithms for Computing IV, (15 November 2002); doi: 10.1117/12.451663
Show Author Affiliations
R. S. Fyath, Univ. of Basrah (Iraq)
Ala A. W. Alsaffar, Univ. of Basrah (Iraq)
Mohammad S. Alam, Univ. of South Alabama (United States)

Published in SPIE Proceedings Vol. 4788:
Photonic Devices and Algorithms for Computing IV
Khan M. Iftekharuddin; Abdul Ahad S. Awwal, Editor(s)

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