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Proceedings Paper

Development of a configurable architecture for smart pixel research (CASPR)
Author(s): Prosenjit Mal; Jason Frederick Cantin; Fred Richard Beyette Jr.
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Paper Abstract

The design, demonstration and evaluation of a general purpose, smart pixel based photonic information processing unit is presented. Based on a photonic VLSI device technology that can be implemented using a standard 1.5-micrometers CMOS, each pixel incorporates a photoreceiver with a RISC processor and produces a device that is suitable for prototyping photonic information processing systems.

Paper Details

Date Published: 26 December 2001
PDF: 6 pages
Proc. SPIE 4435, Wave Optics and VLSI Photonic Devices for Information Processing, (26 December 2001); doi: 10.1117/12.451152
Show Author Affiliations
Prosenjit Mal, Univ. of Cincinatti (United States)
Jason Frederick Cantin, Univ. of Cincinnati (United States)
Fred Richard Beyette Jr., Univ. of Cincinnati (United States)

Published in SPIE Proceedings Vol. 4435:
Wave Optics and VLSI Photonic Devices for Information Processing
Pierre Ambs; Fred Richard Beyette Jr.; Fred Richard Beyette Jr., Editor(s)

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